- We Want To Build A Special Modulo 6 Counter With 3 J K Flip Flops That Counts In A Very Silly Way 0 2 4 6 3 1 0 1 (7.76 KiB) Viewed 37 times
Q FF₁ C Q K FF2 C J Q J J K₁ J₂ K3 Count pulses Logic network The design and implementation of the counter require the following specific steps: 1. Derive a transition table for the output Q1, Q2, Q3 2. Derive the minimum expressions for the excitation functions: J1, K1,J2,K2,J3,K3 using K-map Draw the complete circuit designed 3. 4. Write the coding and test bench for simulation. Must uses structural description with J/K flip/flops as a components (Behavioral modeling is NOT allowed) 5. Run implementation and post implementation timing simulation 6. Convert the binary representation of the F/Fs outputs to decimal and display on HEXO (7- segment) 7. Demo and Report submission K 23 Q K₂ FF 3 C K