40. For the following timing circuit with TSETUP = 30ps, THOLD = -20ps and TCHQY = 20ps IF both combinational blocks hav
Posted: Fri Apr 29, 2022 9:06 am
40. For the following timing circuit with TSETUP = 30ps, THOLD = -20ps and TCHQY = 20ps IF both combinational blocks have a minimum delay of 400ps and a maximum delay of 800ps. how large could delay3 become and the circuit still operate correctly? 2 400MHz +/-1% 200p <delay)<2007 - 100p < dey2 <1000 -200 dolay< 100 CLK CLK CLK D D D D D Comb Logici C Legk2 D D D D D D (a) 340ps (b) 540ps (c) 300ps (d) 500ps