Answer Happy

The partitioning for the Traffic Light System is shown in Figure
2. You will create the DisplayDriver_pi module using VHDL design
entry, the Controller_pi module using the state diagram and finally
the final TLS_pi module using schematic capture
provide the VHDL code
In this test, you will be designing a simple Traffic Light System as shown in Figure 1. In this system, there are two sets of traffic lights. VG, VR and VA are the green, red and amble light respectively for vehicular flow. PG and PR are the green and red light respectively for pedestrian crossing. The seven-segment LED displays the amount of time left for the pedestrian to cross. There is a push button, PB on each side of the road for the pedestrian to push if he/she wants to cross the road. If nobody pushes PB, VG and PR will remains on for vehicle to flow. When somebody pushes PB, VG goes off and VA turns on in the next positive clock trigger. In the following clock cycle VA and PR will go off and VR and PG will turns on. At the same time the timer will count down from 2 to 0. Once this time has elapsed VR and PG will goes off and VG and PR will turns on to allow the vehicle to pass even though PB is pressed again. Repeated pressing of PB during count-down time does not extend the duration of count-down. When the timer is not counting, the 7-segment LED should display according to Table 1 depending on your PI number. PB is clocked in by an active high Clock signal. Reset is an asynchronous active high input.