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Question 5 5 points Save Answer a) By convention, a cache is named according to the amount of data it contains (.e., a 4 KiB cache can hold 4 KiB of data); however, caches also require SRAM to store metadata such as tags and valid bits. A designer considering a direct-mapped 16 KiB cache that holds both instructions and data Each block will hold 32 bytes of data (not including tag, valid bit, etc.) Physical addresses are 32 bits The caches are byte addressable and words are 32 bits D) How many blocks would be in this cache? H) How many bits of tag are stored with each block entry? m) What is the ratio between total bits required for such a cache implementation over the data storage bits?