Answer Happy

2. We do not discuss the datapath for I-type instructions like ADDI or ANDI. (a) What additional logic blocks, if any, are needed to add i-type instructions to the CPU shown in the following figure (Figure 4.23 in the textbook)? Add any necessary logic blocks to it and explain their purpose. (b) Show the dataflow for this instruction using dash lines on the following figure Add ax 4 - ALU Add result Shift left 2 Reg2Loc Branch MemRead MemtoReg Instruction (31-21) Control ALUOp Mem Write ALUSrc RegWrite Instruction [9-5] Instruction [20-16) PC Read address Zero Read register 1 Read data 1 Read register 2 Write Read data 2 register Write data Registers Instruction (31-0] Instruction memory ALU ALU Address Read result data 6E5x M Instruction (4-0) 11 Write Data data memory Instruction (31-O] 32 64 Sign- extend ALU control Instruction (31-21] (c) List the values of the signals generated by the control unit for ADDI. Explain the reasoning for any “don't care" control signals. Reg2Loc ALUSrc MemtoReg RegWrite MemRead Mem Write Branch ALUOP1 ALUOPO