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Posted: **Wed Apr 27, 2022 5:49 pm**

: 1 Introduction In This Lab We Are Going To Study The Basic Sequential Logic Circuit J K Flip Flop D Flip Flop And T 1 (30.35 KiB) Viewed 32 times

: 1 Introduction In This Lab We Are Going To Study The Basic Sequential Logic Circuit J K Flip Flop D Flip Flop And T 2 (52.69 KiB) Viewed 32 times

1. Introduction In this lab, we are going to study the basic sequential logic circuit (J-K Flip-flop, D Flip-flop and T Flip- flop). Especially, we are going to study how to convert from one type of FF to the other type. We are going to evaluate its functionality using the OrCAD and PSpice. 2. Logic components 7408 (Quad 2-input AND gate), 7432 (Quad 2-input OR gate), 7404 (Hex Inverter), 7474 (Dual D Flip-Flop). 7476 (Dual J-K Flip-Flop) 3. Familiarization of J-K Flip-flop • Consult the attached data sheet of IC 74LS76A (shown in Appendix), which offers individual J, K, Clock Pulse, Direct Set/Preset and Direct Clear inputs. • Use no more than one sentence to describe the functions of the following pins: K CP ► Sp , Ср
CCIT4082: Introduction to Digital Circuit (Spring 2022) 4.3 T Conversion of a D-type flip-flop to a T-type flip-flop Design and simulate a toggling flip-flop using a D-type flip-flop with logic gates, and verify your design by going through the truth table. Input Output Q(++1) 0 ୧() Q' () 1 Q (0) Q(1) The test stimuli can be generated by defining the following signal timings as follows, Stimulus: CLK т nPRE nCLR Signal: COMMAND1 Ons 0 Ons 1 Ons 1 Ons 0 COMMAND2 100ns 1 150ns 0 50ns 1 50ns 1 COMMAND3 200ns 0 350ns 1 950ns 0 750ns 0 300ns 1 550ns 0 1050ns 1 850ns 1 400ns 0 500ns 1 COMMANDT 600ns 0 COMMANDS 700ns 1 COMMAND4 COMMANDS COMMAND6 where, CLK-Clock signal input to the flip-flop T-T signal input to the flip-flop NPRE - Direct Set/Preset input to the flip-flop nCLR - Direct Clear input to the flip-flop consider using DigClock instead of hardcoding the STIMI source, like the lecture demo.