Answer Happy

Please solve Exercise 1
University Institute of Technology Computer Communication and Networking Engineering الجامعة اللبنانية المعهد الجامعي للتكنولوجيا قسم هندسة شبكات المعلوماتية والاتصالات First year Semester 1 2014-2015 First Session Digital Electronics Documents not allowed 11 February 2015 Duration 2 hours Exercise I (4/20) ) We want to design a transcoder allowing the conversion from a code to a code S. the truth table of a this trans-coder is given below: BO 1 0 1 83 0 0 0 0 0 1 1 1 1 1 1 1 Inputs (code B) B2 BI 0 1 1 0 1 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 Outputs codes 52 SI 0 0 0 0 0 1 0 1 1 0 0 1 1 o 0 1 1 0 1 1 1 1 S3 0 0 0 0 0 O 1 1 1 1 11 1 o 1 0 1 0 SO) 0 0 1 0 11 0 1 10 1 1 0 11 N.B.: combinations which don't appear in the table are considered as a "don't care" cases (X). Find the simplified expressions of the outputs Si. 2. Draw the corresponding logie diagram of this transcoder. Exercise 1(6/20) We want to design a complete cycle synchronous counter So we propiere to study a synclatuto modulo to counter based on the use of the JK flip flops. 1-How many flip-flops do we need to realize this counter 2- Give the truth table corresponding to this counter including QLQI', Ji and Ki. 3. Lise this truth table to find the simplified expressions of Ji and Ki in terms of Oi 4-Druw the corresponding logic diagram. Exercise 111(6/20) A. Consider the asynchronous counter represented in the figure below. We want to study the functioning of this counter by computing its output sequence. For that 1. Fill in the truth table of this counter for the variables Q2. Q1 and Q0. Taking that the initial state is Q2Q100000 2. Draw the timing diagram of this counter corresponding to Q2 Q1 and 0. ot 1 100 D GO HD KI RESET QI 1 B- Given the circuit of an asynchro counter based on the JK flip-flops below. Note that the flip-flopiki changes its state if, and only if, 0 changes its state from 1 to 0. 1- Give the equations of liki 2 Find the sequence realized by this counter, taking that the initial state is Q2Q100=000. 3. Draw the corresponding timing diagram