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QUESTION 3 (a) You are required to design an embedded system that uses an 8-bit RISC microprocessor. (i) What is the data bus width of the microprocessor? (ii) If the address bus of the microcontroller has 8 lines, what is the maximum amount of memory it can access? (iii) Suppose that a given memory block uses addresses 0x10 - 0x15. What is the size of this memory block? (iv) If a 32-bit value 0x31a79847 is stored to the location 0x10, what is the byte in address 0x12? Assume that the system uses big endian. (v) Suppose that the RISC microprocessor has 3 stages (FI: Fetch Instruction; DI: Decode Instruction; EI: Execute Instruction). Each stage can be executed within 1 clock cycle. Draw the timing diagram for the following set of consecutive assembly language instiuctions: LDI OUT R20, 0x55 ; R20 = 0x55 PORTB, R20 ; move [R20] to PORTB (vi) If the unpipelined version of the microprocessor in (v) has a cycle time of 30 ns and the 3 pipeline stages are divided into 10 ns, 8 ns and 12 ns respectively, what is the cycle time of this pipelined processor? Assumed that the latch has a latency of 1 ns. (19 marks)