Answer Happy

101 Z=1 11. The following is one state of an FSM state graph. Indicate the type of FSM, and the number of flip-flops needed to implement it, respectively. A. Moore, 5 B. Moore, 3 C. Mealy, 5 D. Mealy. 3 E. Cannot determine whether Mealy or Moore, 3 12. PALs are constructed from A. An AND plane followed by an OR plane C. An OR plane followed by an AND plane E. None of the choices B. TWO AND planes D. TWO OR Planes 13. AB + BC + CA simplifies to A. AB + BC C. AB+CA B. BC + CA D. A+B+C E. None of the choices 14. Glitches are serious threats to the operation of what type of circuits? A. Static circuits B. Synchronous circuits C. Asynchronous circuits D. Dynamic circuits E. None of the choices
15. How may one construct a flip-flop which changes state on the falling edge of the clock (i.e., a negative- edge triggered flip-flop), using two D-latches? A. By connecting the output of a high-transparent D-latch to the input port of a low-transparent one B. By connecting the output of a low-transparent D-latch to the input port of a high-transparent one C. By connecting the output of a high-transparent D-latch to the input port of another one D. By connecting the output of a low-transparent D-latch to the input port of another one