In AVR, when is the V flag set?
Posted: Thu Jul 14, 2022 8:40 am
a) there is a carry from D7 bit
b) there is a carry from D6 to D7 bit
c) when carry is generated only from D6 to D7 or carry is generated only from D7
d) none of the mentioned
b) there is a carry from D6 to D7 bit
c) when carry is generated only from D6 to D7 or carry is generated only from D7
d) none of the mentioned