Page 1 of 1

ALUOp1 0 X 1 1 1 1 ALUOP ALUOp0 0 1 X X X X Opcode field I[31] [30] [29]||[28]||[27] [26] [25] [24]||[23]||[22] [21] X X

Posted: Tue Jul 12, 2022 8:15 am
by answerhappygod
Aluop1 0 X 1 1 1 1 Aluop Aluop0 0 1 X X X X Opcode Field I 31 30 29 28 27 26 25 24 23 22 21 X X 1
Aluop1 0 X 1 1 1 1 Aluop Aluop0 0 1 X X X X Opcode Field I 31 30 29 28 27 26 25 24 23 22 21 X X 1 (55.92 KiB) Viewed 33 times
Aluop1 0 X 1 1 1 1 Aluop Aluop0 0 1 X X X X Opcode Field I 31 30 29 28 27 26 25 24 23 22 21 X X 2
Aluop1 0 X 1 1 1 1 Aluop Aluop0 0 1 X X X X Opcode Field I 31 30 29 28 27 26 25 24 23 22 21 X X 2 (140.29 KiB) Viewed 33 times
Aluop1 0 X 1 1 1 1 Aluop Aluop0 0 1 X X X X Opcode Field I 31 30 29 28 27 26 25 24 23 22 21 X X 3
Aluop1 0 X 1 1 1 1 Aluop Aluop0 0 1 X X X X Opcode Field I 31 30 29 28 27 26 25 24 23 22 21 X X 3 (84.51 KiB) Viewed 33 times
ALUOp1 0 X 1 1 1 1 ALUOP ALUOp0 0 1 X X X X Opcode field I[31] [30] [29]||[28]||[27] [26] [25] [24]||[23]||[22] [21] X X X X X X X X X X X X 0 0 0 1 0 1 0 0 1 0 0 0 0 0 1 1 1 1 X X 0 0 X X 1 1 1 1 X X 1 1 0 0 1 0 X X 0 0 0 0 0 0 1 0 0 FIGURE 4.13 The truth table for the 4 ALU control bits (called Operation). The inputs are the ALUOp and opcode field. Only the entries for which the ALU control is asserted are shown. Some don't-care entries have been added. For example, the ALUOp does not use the encoding 11, so the truth table can contain entries IX and X1, rather than 10 and 01. While we show all 11 bits of the opcode, note that the only bits with different values for the four R-format instructions are bits 30, 29, and 24. Thus, we only need these three opcode bits as input for ALU control instead of all 11. Operation 0010 0111 0010 0110 0000 0001
ALUOp1 0 X 1 1 1 1 1 ALUOP ALUOP ALUOP ALUOp1 0 X ALUOPO 0 1 X X X X X ALUOPO 1 X F5 X X b. The truth table for Operation1 = 1 ALUOp1 1 1 ALUOP FIGURE C.2.1 The truth table for the four ALU control bits (called Operation) as a function of the ALUOp and function code field. This table is the same as that shown in Figure 4.13. ALUOPO X X F5 X X X X X X X ALUOPO X X F4 X X X X X X X F5 X X c. The truth table for Operation0 = 1 ALUOp1 F5 F2 F1 FO 0 X X X X 1 X X 1 Xx a. The truth table for Operation2 = 1 (this table corresponds to the second to left bit of the Operation field in Figure C.2.1) F4 X X Funct field F3 F2 X X X X 0 0 0 0 1 1 0 F4 X X 0 0 1 F4 X X FO X X 0 0 0 0 1 1 0 F1 X X 0 1 0 Function code fields F3 X X Function code fields F3 X X F2 X 0 Operation Function code fields F3 X 1 F2 X X 0010 0110 0010 0110 0000 0001 0111 F1 X X F1 X X FO X X FO 1 X FIGURE C.2.2 The truth tables for three ALU control lines. Only the entries for which the output is 1 are shown. The bits in each field are numbered from right to left starting with 0; thus F5 is the most significant bit of the function field, and FO is the least significant bit. Similarly, the names of the signals corresponding to the 4-bit operation code supplied to the ALU are Operation3, Operation2, Operation 1, and Operation0 (with the last being the least significant bit). Thus the truth table above shows the input combinations for which the ALU control should be 0010, 0001, 0110, or 0111 (the other combinations are not used). The ALUOp bits are named ALUOp1 and ALUOp0. The three output values depend on the 2-bit ALUOp field and, when that field is equal to 10, the 6-bit function code in the instruction. Accordingly, when the ALUOp field is not equal to 10, we don't care about the function code value (it is represented by an X). There is no truth table for when Operation3=1 because it is always set to 0 in Figure C.2.1. See Appendix A for more background on don't cares.
F (5-0) F3 F2 F1 FO ALUOP ALUOpo ALUOP1 ALU control block Operation3 Operation2 Operation1 Operationo - Operation FIGURE C.2.3 The ALU control block generates the four ALU control bits, based on the function code and ALUOp bits. This logic is generated directly from the truth table in Figure C.2.2. Only 4 of the 6 bits in the function code are actually needed as inputs, since the upper 2 bits are always don't cares. Let's examine how this logic relates to the truth table of Figure C.2.2. Consider the Operation2 output, which is generated by two lines in the truth table for Operation2. The second line is the AND of two terms (F1 = 1 and ALUOp1 = 1); the top two-input AND gate corresponds to this term. The other term that causes Operation2 to be asserted is simply ALUOp0. These two terms are combined with an OR gate whose output is Operation2. The outputs Operation0 and Operation1 are derived in similar fashion from the truth table. Since Operation3 is always 0, we connect a signal and its complement as inputs to an AND gate to generate 0.