Answer Happy

Show how the example memory system in Section 9.6.4 the textbook translates a virtual address into a physical address and accesses the cache. For the given virtual address, indicate the TLB entry accessed, physical address, and cache byte value returned. Indicate whether the TLB misses, whether a page fault occurs, and whether a cache miss occurs. If there is a cache miss, enter "---" for "Cache byte returned." If there is a page fault, enter "---" for "PPN" and leave parts C and D blank. Virtual address: 0x03d7
Virtual address format Drag the appropriate labels to their respective targets. 13 12 11 10 9 8 7 6 5 4 3 2 1 0 doc Reset Help
Address translation Drag the appropriate labels to their respective targets. OXO 0x1 0x2 0x3 0x4 0x5 0x6 0x7 Oxd Oxe Oxf Y N --- Parameter VPN TLB index TLB tag TLB hit? (Y/N) Page fault? (Y/N) PPN Value Reset Help
Physical address format Drag the appropriate labels to their respective targets. 11 10 9 8 7 6 5 4 3 2 1 0 Reset Help
Physical memory reference Drag the appropriate labels to their respective targets. OxO 0x1 0x2 0x3 0x4 0x5 0x6 Oxd OXOC OXOE OXOF 0x1C 0x1d Ox3A OxD3 OXFO Y N Parameter Byte offset Cache index Cache tag Cache hit? (Y/N) Cache byte returned Value Reset Help