1. In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exe
Posted: Tue Jul 12, 2022 8:05 am
1. In this exercise we examine in detail how an instruction isexecuted in a single-cycle datapath. Problems in this exerciserefer to a clock cycle in which the processor fetches the followinginstruction word:
10101100011000100000000000010100
1) What are the outputs of the sign-extend and the jump “Shiftleft2” unit (near the top of Figure above) for this instructionword?
2) What are the values of the ALU control unit’s inputs for thisinstruction?
3) What is the new PC address after this instruction isexecuted?
PC Instruction [25-0] Add Read address Instruction [31-0] Instruction memory 26 Shift left 2 Instruction [31-26] Instruction [25-21] Instruction [20-16] 0 M Instruction [15-11] X Instruction [15-0] Jump address [31-0] PC +4 [31-28] Control 28 RegDst Jump Branch MemRead MemtoReg ALUOP MemWrite ALUSrc RegWrite Read register 1 Read register 2 Write register 16 Read data 1 Read data 2 Write data Registers Sign- extend Instruction [5-0] 32 Shift left 2 0 ALU Add, result Zero ALU ALU result ALU control Addre MUX Read data Write Data data memory MUX M u
10101100011000100000000000010100
1) What are the outputs of the sign-extend and the jump “Shiftleft2” unit (near the top of Figure above) for this instructionword?
2) What are the values of the ALU control unit’s inputs for thisinstruction?
3) What is the new PC address after this instruction isexecuted?
PC Instruction [25-0] Add Read address Instruction [31-0] Instruction memory 26 Shift left 2 Instruction [31-26] Instruction [25-21] Instruction [20-16] 0 M Instruction [15-11] X Instruction [15-0] Jump address [31-0] PC +4 [31-28] Control 28 RegDst Jump Branch MemRead MemtoReg ALUOP MemWrite ALUSrc RegWrite Read register 1 Read register 2 Write register 16 Read data 1 Read data 2 Write data Registers Sign- extend Instruction [5-0] 32 Shift left 2 0 ALU Add, result Zero ALU ALU result ALU control Addre MUX Read data Write Data data memory MUX M u