Answer Happy

hi can you please help me in my assignment in Digital logic assoon as possible, and can The answer be in typing nothand writing please
thank you so much
PART B (Design of a Synchronous Counter) Refer to the following state diagram: 1) 2) 3) 1/0 01 1/0 IARUL X 0/0 00 Design a synchronous counter using T, and JK flip-flops. Present State 00 0/0 Q1+ 1/1 Built the next state and transition table using the header in Table 2. This design example is using T flip-flops. Find the optimum SOP equation for flip-flops input and output. Table 2 Next State /1/0 Draw the circuit and simulate using Deeds. Prove that the design is working, by drawing the state diagram resulted from your simulation. 0/0 00+ 10 0/0 TFF Transition Ti TO Querak Z