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In this assignment you will look at the characteristics on a CMOS inverter. This circuit forms the basis for all complex CMOS logic functions. The inverter delay and power behaviors indicate how changes in MOSFET parameters will affect the speed and power requirements for complex devices like microprocessors. All of this assignment requires CircuitLab or PSPICE simulations of MOSFET inverters. The Transfer Characteristic Figure la shows the schematic of a CMOS inverter. The device on top is a PMOS device; it is "off" for a high input voltage and "on" for a low input. The device on the bottom is an NMOS device; it is "on" for a high input and "off" for a low input. Figure 1b shows a rough VOD voltage transfer characteristic (Vo vs V₁). Problem 1 (a) Draw the inverter schematic in CircuitLab for Mp MN + VDD 0 VDD Figure 1. (left) CMOS inverter where Mp is a PMOS device and My is an NMOS device. (right) Inverter voltage transfer curve (Vo vs V₁). only one inverter. For VDD = 5 V, do a "DC sweep" of the input voltage Transfer Characteristic (Vo vs V₁) using CircuitLab. (See Appendix I for CircuitLab tips) 0 (b) Next add two extra inverters (See Figure 2.) and compare the transfer characteristic of the combination to the transfer characteristic you got in (la).
e c t Voo PROBLEM 1 - TURN IN: a) Part a (should closely match Figure 1) i. ii. Figure 2. (left) Three CMOS inverters in cascade. (right) Three symbolic inverters in cascade. (c) Find NML and NMH from the transfer characteristic you obtained in parts (1a) and (1b). You will need to estimate where the slope of the curve equals -1. See Section 5.1 in the Agarwal text for a discussion of noise margin. VoH = VDD is the high voltage, VIH is where the slope = -1, and NMH = VOH - VIH. VOL = 0 is the low voltage, VIL is where the slope = -1 again, and NML = VIL - VOL. Note the subscripts referring to either Vi or Vo, e.g., Von is the output voltage value (y axis), whereas VI is the input voltage value (x axis). "DDD" Turn in a table which compares the NML, NMH for part (1a) to those of part(1b). Turn in your CircuitLab schematic (with your name annotated in the schematic!) and plots of the transfer characteristic for cases (1a) and (1b). b) Part b (match Figure 2) i. ii. a) single inverter V₂ b) three inverters CircuitLab schematic for one inverter (label Vo and V₁) CircuitLab output plot showing transfer characteristic (Vo vs VI) c) Part e (turn in this completed table. Write units) VOH VIH NMH V₂ CircuitLab schematic for all three inverters CircuitLab output plot showing transfer characteristic (Vo vs V₁) VOL VIL NML