(b) Demonstrate by sketching how a 74138 decoder in FigureQ.4(a) and NAND gates can be used to implement the following l
Posted: Fri Jul 01, 2022 6:16 am
- B Demonstrate By Sketching How A 74138 Decoder In Figureq 4 A And Nand Gates Can Be Used To Implement The Following L 1 (79.88 KiB) Viewed 33 times
- B Demonstrate By Sketching How A 74138 Decoder In Figureq 4 A And Nand Gates Can Be Used To Implement The Following L 2 (68.47 KiB) Viewed 33 times
Q4 DIGITAL ELECTRONICS
(b) Demonstrate by sketching how a 74138 decoder in FigureQ.4(a) and NAND gates can be used to implement the following logic functions. P(A,B,C) = m(0,1,2) and Q(A,B,C) = m(4,6,7) Tii یایی | G₁ G₂A G₂B S₂ S₁ So Y₁b- Y₁b- Y₂ Y3 Y4 Ys Yop- Y₁ FigureQ.4(a) FigureQ.4(b) is a diagram of a 7-segment display. [4 marks] [CO2, PO2, C3] (i) If an active-LOW BCD to 7-segment display decoder is used, what will happen to the LED segment of a common-anode versus a common-cathode display? [2 marks] [CO2, PO2, C3] (ii) A 7447 active-LOW BCD to 7-segment display decoder drives a common- anode 7-segment display. What are the outputs of the decoder (a, b, c, d, e, f, g) when input to the decoder is 0110? [2 marks] [CO2, PO2, C3] When the 7447 chip is replaced by a 7448 [active-HIGH BCD to 7-segment display decoder] what are the decoder's outputs (a, b, c, d, e, f, g) when input 0010 is asserted? [2 marks] [CO2, PO2, C3]
Cik X Q₁ Z X (c) Circuits shown in FigureQ.4(c) has one input X and one output Z. Analyze the circuit and complete the timing diagram in Figure Q.4(d). The initial output for both flip-flops are 0 QA (MSB) Clock D SET f CLR Q a g b C d FigureQ.4(b) DB O FigureQ.4(c) Figure Q.4(d) to. Z SET CLR Q [10 Marks] [CO3, PO2, C4]