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QUESTION 3 a) Table Q.2(a) shows the truth table for an output function Y (A, B, C, D) A 0 0 0 0 0 0 0 0 1 1 1 (1) (11) (iii) 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Table Q.2(a) Inputs C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output Y 0 0 1 1 0 0 0 0 1 1 1 1 1 0 0 1 (1) Write the standard SOP expression for Y. (ii) Determine the minimized SOP expression for Y by using K-map. (iii) Implement the circuit for Y by using MUX 4:1 and NAND gates only. (b) A ROM chip is used to implement the Boolean functions listed below. W(A, B, C) = m(0,2,4,6) X(A, B, C) IIM(1,3,5,7) Y(A, B, C) = ABC + ABC + ABC + ABC Z(A,B,C) = (A + B)(Ā+B+C) What is the ROM size required? Write down the truth table for the ROM address and data lines. Implement the ROM circuit using a 3-to-8 active high decoder. Draw and label the connections clearly.