Consider the following behavior of a sequential logic. A state machine for this behavior will have one input named X, on
Posted: Fri Jun 10, 2022 11:58 am
Consider the following behavior of a sequential logic. A state machine for this behavior will have one input named X, one output named Z, and a 2-bit register (using D-type flip-flops) for state information. Assume that the state is represented by Q₁Qo signals of the register. The four states are coded as: Q₁Qo = 00 means So; Q₁Q0 = 01 means S₁; Q1Qo = 10 means S₂; and Q₁Qo = 11 means S3. Begin by obtaining a state transition table based on this state diagram: @x=0|z=0 x=0/2=0 D₁ Do 2-BIT REGISTER *CLOCK 2₁ 20 LOAD F So x=0/2=0 X=112=1 x=012=1 X=1/2=1 Xx=112=0 x=1|2=1