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10 ΚΩ Vcc=5 V RB2 D₁₂ D₁ Re KK w Du VINA OK 10 kQ DIB INB FIGURE P6.5 6. For the DTL gate of Figure P6.5, determine IRB Irā IB.O, and Vour for all possible combinations of low (0.2 V) and high (5 V) inputs. Also, sketch the VTC. >1 ΚΩ 8.5 1 OV Qo

Let V₁(ON) = 0.7 V for the diode and Br = 100, 0.8 V, and VCE(SAT) VBE (FA) = 0.7 V, VRE(SAT) = 0.2 V for the BJT.