Page 1 of 1
Suppose a byte-addressable memory with 4 frames of size 8 bytes each and a paged virtual memory using a three-entry TLB.
Posted: Mon Jun 06, 2022 5:08 pm
by answerhappygod
- Suppose A Byte Addressable Memory With 4 Frames Of Size 8 Bytes Each And A Paged Virtual Memory Using A Three Entry Tlb 1 (21.32 KiB) Viewed 34 times
Suppose a byte-addressable memory with 4 frames of size 8 bytes each and a paged virtual memory using a three-entry TLB. Suppose a process P has 8 pages of virtual memory space. Assume the following TLB and page table for process P: TLB Page Frame 1 6 2 3 Framell Valid . 0 4 0 3 0 1 5 0 6 2 1 7 1 A Page Table Assume process P generates a memory request with virtual address Ox35. Does this memory reference result in a TLB hit/miss? What is its corresponding physical address? You may represent the address in binary or hexadecimal notation (if hexadecimal notation, prefix with Ox). If the request causes a page fault, enter page fault. 0 0 1 2 3 4 0 1