Answer Happy

Can someone help with by writing the code for the following two
questions please. Not just place any random answer. need actual
answer please. Thanks
Question 1 [10 Marks] a. Construct a VHDL model for a 4-bit up-down counter with asynchronous reset as shown in Figure 1. up_down Clock Reset Figure 1 b. Write VHDL code to model the following circuits (A,B, C are output port) C B 8 CN ON A A ClrN Dy D₂ Cik Cik Cik 4 Din Count De