Page 1 of 1
1) The single cycle processor developed in the class is shown Figure 1. Suppose that the following instruction needs to
Posted: Mon Jun 06, 2022 11:14 am
by answerhappygod

- 1 The Single Cycle Processor Developed In The Class Is Shown Figure 1 Suppose That The Following Instruction Needs To 1 (68.87 KiB) Viewed 30 times

- 1 The Single Cycle Processor Developed In The Class Is Shown Figure 1 Suppose That The Following Instruction Needs To 2 (61.55 KiB) Viewed 30 times
1) The single cycle processor developed in the class is shown Figure 1. Suppose that the following instruction needs to be added to our single-cycle datapath. bgezal rs, imm Opcode 15 11-0 Imm If (R[rs] ≥0) PC PC +4+ (SignExt(Imm16) || 00) R[31]+PC+4 Else PC PC+4 a) Remember that the original datapath in Figure 1 supports R-type instructions, ori (or immediate), Iw (load word), sw (store word), and beq (branch on equal) and ALU implements and (logical and), or (logical or), add (addition), sub (subraction), and sit (set on less than) operations. Describe and sketch modifications needed to the datapath for bgezal instruction. Try to add as little hardware as possibles I b) For bgezal, give the values of all control signals including those you added in the first part. The number of grids below is not an indication of the number of control signals you will need. Control Line 0/1/x Control Line 0/1/x Branch ALUSre RegDst ALUcir RegWr MemWr ExtOp MentoReg
Imm16 16 Sh 32 RegDat Regie busW 32 Cik Rd Rt 1 Mux Imm16 Rs Rt Cik 32 ALU 32 struction Memar Address Brone sto to fie Rs Rt Rd Imm16 32 Rw Ra Rb Register File WrEn Adr Data 32 16 Cik Memory EMCE ALUSIE Figure 1. The single cycle datapath designed in the class Equal Ma 32 MantReg I