Create a VHDL model of the ALU of a (SAP) Simple as Possible computer. The ALU only needs to be able to perform addition
Posted: Tue May 24, 2022 8:59 am
Create a VHDL model of the ALU of a (SAP) Simple as Possible computer. The ALU only needs to be able to perform addition and subraction. Show the complete VHDL codes. Hint: ALU_sel is only 1 digit.