Part(C):DC Analysis of PMOS circuit Using orCAD, for the above circuit: 3) Apply VS=3V, i) iii) Vto -1.6V, L-lu, W=70u M
Posted: Tue May 24, 2022 8:55 am
Part(C):DC Analysis of PMOS circuit Using orCAD, for the above circuit: 3) Apply VS=3V, i) iii) Vto -1.6V, L-lu, W=70u M1 MbreakpD VG VD ID RD Fig.2 RD=0.5K, Simulate the circuit to Find VD and ID. ii) RD=2K, Simulate the circuit to Find VD and ID. Use trial and error to find RD which make the transistor @ the edge of saturation (VSD= VSG-|Vtp|) O VS O