Answer Happy

Solve part 1 and part 2
Objective: To reinforce FPGA design flow using simple circuits. Students should understand basic Verilog concepts, the difference between hardware and software implementation of digital functions, and how to implement a design using user constraint files and other software tools. Equipment Needed: ISE webpack 14.7 with Plan Ahead and iMpact • Digilent Nexys 3 FPGA board Note: Refer previous lab sheet tutorial procedure for implementing the combinational logics. PART1: Experiment 1: a) Implement the logic circuit in figure 1 in Nexys 3 FPGA board using Verilog HDL. с D B А B D Figure 1. Logic Circuit
b) Create a new project in ISE Webpack and complete the program as shown. module lab5Expl input A, input B, input c, input D, output F ); assign F = ( ( (C&D) B) & A) I (B & C); endmodule c) Using PlanAhead application assign A-D inputs to SWO-SW3 and the output F to LED 0 as follows: (SW = Switch and LED = Light Emitting Diode) SWO to D SW1 to C SW2 to B SW3 to A LEDO to F d) After completing all the procedures and implementing the program in FPGA board, show the results to the instructor. e) Make the truth table for this at the end of this lab sheet or on separate paper. Experiment 2: a) In a certain chemical processing plant, a liquid chemical is used in a manufacturing process. The chemical is stored in three different tanks. A level sensor in each tank produces a HIGH voltage when the level of chemical in the tank drops below a specified point. Design a circuit that monitors the chemical level in each tank and indicates when the level in any two of the tanks drops below the specified point. b) The logic circuit for the above statement is shown in figure 2. B DEE G G Low-level indicator G Figure 2
c) Create a new project in ISE Webpack and complete the program to implement the design in Figure 2. d) Write the Verilog HDL program in below space for the logic circuit in Figure 2. e) Using the PlanAhead application, assign the following pins. (SW = Switch and LED = Light Emitting Diode) SWO to A SW1 to B SW2 to C LEDO to X f) After completing all the procedures and implementing the program in the FPGA board, show the results to the instructor. Experiment 3: A circuit that controls a given digital system has three inputs: X1, X2, and X3. It has to recognize three different conditions: Condition A is true if X3 is true and either X1 is true or X2 is false • Condition B is true if X1 is true and either X2 or X3 is false • Condition C is true if X2 is true and either X1 is true or X3 is false The control circuit must produce an output of 1 if at least two of the conditions A, B, and C are true. Design the simplest circuit that can be used for this purpose and implement the design in Nexys 3 FPGA board. Note: True = 1 and False = 0 Lab Report: PART2 1: A museum has three rooms, each with a motion sensor (MO, M1 and M2) that outputs a "1" when motion is detected. At night, the only person in the museum is one security guard who walks from room to room. Create a circuit that sounds an alarm (by setting an output to 1) if motion is ever detected in more than one room at a time (i.e., in two or three rooms), meaning there must be more than one person in the museum. a) Make the truth table. b) Design the digital logic circuit. c) Write the Verilog HDL program that will implement this. 2: Draw the digital logic circuits from the Verilog HDL expression. assign F = -(A&B) / A&-C/B&C; 3: In experiment 1, the output F is assigned to LED 0. If you want to use LED 5 instead, what pin number will you be assigning to the output F? *****END*****