Answer Happy

Problem 3 — 4 points Design a 4-bit ALU for the specifications in the table below. This unit has a 2-bit control lines P[1:0) to select the required operation, a 4-bit input data PP Operation 00 o D[3:0), and a 4-bit register 01 Q* = Q' (New Q is the invert of the current) output Q[3:0). Note: do not 10 Q* - 20 use any adder in the design. 11 Q2Q + 1 D Polol a. Draw the block diagram for this ALU circuit. (2 points) b. Write the verilog code for this circuit. You do not need to simulate this circuit, but you have to make sure it is free from syntax errors. Use the template below as a starting point. (2 points) module alu4 (input clk, input [1:0] P, input [3:0] D, output reg [3:0] Q); // declare internal wires if needed // here is your design always @(posedge clk) begin end endmodule // alu4