Problem 3
Design a 4-bit ALU for the specifications in the table below.
This unit has a 2-bit control lines
P[1:0] to select the required
operation, a 4-bit input data
D[3:0], and a 4-bit register
output Q[3:0]. Note: do not
use any adder in the design.
a. Draw the block diagram for this ALU circuit.
b. Write the verilog code for this circuit. You do not need to
simulate this circuit, but you have to
make sure it is free from syntax errors. Use the template below as
a starting point.
module alu4 (input clk, input [1:0] P, input [3:0] D, output reg
[3:0] Q);
// declare internal wires if needed
// here is your design
always @(posedge clk)
begin
end
endmodule // alu4
PiPo 00 01 10 11 Operation Q* =D Q* = Q’ (New Q is the invert of the current Q) Q* = 20 Q 2Q + 1
Problem 3 Design a 4-bit ALU for the specifications in the table below. This unit has a 2-bit control lines P[1:0] to se
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