write a testbench in Verilog for a combinations circuit and display your results for A,B,C,D,f CLK etc. f = ABCD!
Posted: Fri May 20, 2022 9:32 pm
write a testbench in Verilog for a combinations circuit and
display your results for A,B,C,D,f CLK etc.
f = ABCD!
с A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
display your results for A,B,C,D,f CLK etc.
f = ABCD!
с A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1