Pls i want the graph as a soft copy (not written), HELP ME PLS UPLOAD THE GRAPH AS IN A SOFT COPY USING THE CORRECT SOFT
Posted: Fri May 20, 2022 7:41 pm
Pls i want the graph as a soft copy (not written), HELP ME
PLS UPLOAD THE GRAPH AS IN A SOFT COPY USING THE CORRECT
SOFTWARES
1. Demonstrate understanding of devices used to interface with Digital Systems: a. The 3-bit Digital to Analog converted (DAC) shown in Figure 1 is the output interface of a digital system. In Figure 1, when b; = 0, Vi = 0; when bi = 1, Vi = Vs, with i = 0,1,2. The DAC parameters are listed in Table 1. (i) Compute the largest (absolute) value Vout, can reach and report the digital input bits required to obtain that output; (ii) For the input waveforms in Figure 2(a), draw the Vout waveform (label all axes). (iii) Adjust the value of the DAC parameter indicated in Table 2 (other parameters remain as in Table 1) so that the peak value for | Vout, resulting for the inputs in Figure 2(a) is varied as indicated in Table 2. Assume this new value to draw the Vout waveform resulting from the input waveforms in Figure 2(b). Note: assume OpAmp behaviour to be ideal (i.e. there is no limitation due to the OpAmp frequency response or OpAmp saturation).
V2 R Rreedback $ b2 w V 2R b1 w Vout Param Vout variation Rfeedback +50% Table 2: DAC parameter change. OV Vs Rfeedback R - 4 V 30 kΩ 10 ko Table 1: DAC parameters. V. 4R bo M Figure 1: 3 bit DAC. -- b b t b2 t[ms] 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 b, t b t[ms] 0 1 2 3 5 6 7 8 0 1 2 3 4 5 6 7 8 t bo bo t[ms] 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 (a) Binary (0/1) input waveforms (b) Binary (0/1) input waveforms Figure 2: DAC input.
b. A conditioning circuit is part of the input interface to a digital system. Figure 3 shows three candidate circuits. Consider the scenarios (i) to (iii) listed below, with specific values for Vx, Vz and 4 given in Table 3. For each scenario, consider all circuits in Figure 3: If a circuit can be used to yield the required Vo for the given V1, report the required values for all resistors in the circuit (include all calculations in your answer; if multiple set of resistor values exist that lead to the intended solution, choose one set); If a circuit can't be used, explain the reason. Scenario (i) Vi(t) = Vx * cos(2n*t/T) and Vo(t) = Vz * cos(2n*t/T); * Scenario (ii) Vi(t) = Vx * sin(21*t/T) and Vo(t) = (-1) * V2 * sin[ (2n*t/T) - ]; Scenario (iii) Vi(t) = Vx * sin(21*t/T) and Vo(t) = Vz* [1 + sin(21*t/T) ]/2; Note: assume OpAmp behaviour to be ideal (i.e. there is no limitation due to the OpAmp frequency response or OpAmp saturation). *
R2 R2 R4 R1 R1 016 R3 vo Circuit Circuit 11 R2 R4 RO R1 R3 R5 V Circuit III Figure 3: Conditioning circuits.
Х Label [Unit] Y Z XX YY ZZ XYZ t r- 1 0 1 2 3 4 5 6 7 8
- Pls I Want The Graph As A Soft Copy Not Written Help Me Pls Upload The Graph As In A Soft Copy Using The Correct Soft 1 (136.74 KiB) Viewed 43 times
SOFTWARES
1. Demonstrate understanding of devices used to interface with Digital Systems: a. The 3-bit Digital to Analog converted (DAC) shown in Figure 1 is the output interface of a digital system. In Figure 1, when b; = 0, Vi = 0; when bi = 1, Vi = Vs, with i = 0,1,2. The DAC parameters are listed in Table 1. (i) Compute the largest (absolute) value Vout, can reach and report the digital input bits required to obtain that output; (ii) For the input waveforms in Figure 2(a), draw the Vout waveform (label all axes). (iii) Adjust the value of the DAC parameter indicated in Table 2 (other parameters remain as in Table 1) so that the peak value for | Vout, resulting for the inputs in Figure 2(a) is varied as indicated in Table 2. Assume this new value to draw the Vout waveform resulting from the input waveforms in Figure 2(b). Note: assume OpAmp behaviour to be ideal (i.e. there is no limitation due to the OpAmp frequency response or OpAmp saturation).
V2 R Rreedback $ b2 w V 2R b1 w Vout Param Vout variation Rfeedback +50% Table 2: DAC parameter change. OV Vs Rfeedback R - 4 V 30 kΩ 10 ko Table 1: DAC parameters. V. 4R bo M Figure 1: 3 bit DAC. -- b b t b2 t[ms] 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 b, t b t[ms] 0 1 2 3 5 6 7 8 0 1 2 3 4 5 6 7 8 t bo bo t[ms] 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 (a) Binary (0/1) input waveforms (b) Binary (0/1) input waveforms Figure 2: DAC input.
b. A conditioning circuit is part of the input interface to a digital system. Figure 3 shows three candidate circuits. Consider the scenarios (i) to (iii) listed below, with specific values for Vx, Vz and 4 given in Table 3. For each scenario, consider all circuits in Figure 3: If a circuit can be used to yield the required Vo for the given V1, report the required values for all resistors in the circuit (include all calculations in your answer; if multiple set of resistor values exist that lead to the intended solution, choose one set); If a circuit can't be used, explain the reason. Scenario (i) Vi(t) = Vx * cos(2n*t/T) and Vo(t) = Vz * cos(2n*t/T); * Scenario (ii) Vi(t) = Vx * sin(21*t/T) and Vo(t) = (-1) * V2 * sin[ (2n*t/T) - ]; Scenario (iii) Vi(t) = Vx * sin(21*t/T) and Vo(t) = Vz* [1 + sin(21*t/T) ]/2; Note: assume OpAmp behaviour to be ideal (i.e. there is no limitation due to the OpAmp frequency response or OpAmp saturation). *
R2 R2 R4 R1 R1 016 R3 vo Circuit Circuit 11 R2 R4 RO R1 R3 R5 V Circuit III Figure 3: Conditioning circuits.
Х Label [Unit] Y Z XX YY ZZ XYZ t r- 1 0 1 2 3 4 5 6 7 8