Answer Happy

(9) 5. Convert the following Boolean Expression into a Circuit Diagram and then a Truth Table (Include all steps in the truth table) A. HDL B 드 (3) a: Boolean Expression ( + : (6) b: I A 0 0 0 0 1 1 1 B 0 0 1 1 0 0 1 1 С 0 1 0 1 0 1 0 1 (6) 6. Match the following three registers in OAM with the letter of the best description of each among the candidates in the column on the right. (2) a: Program Counter (PC) A. holds current value being processed (2) b: Instruction Register (IR) B. holds the current instruction (2)c: Accumulator C. holds address of next instruction to be executed D. holds the total number of instructions 2

(4) 7. Specify the four steps taken by the Control Unit (CU) in the fetch portion of the fetch-execute cycle (see PowerPoint handout). 1. 2. 3. 4. (6) 8. In the context of primary storage: (3) b. Briefly distinguish among main memory, register memory, and cache memory with respect to proximity (close, closer, or closest) to the processor Circle the correct answer: (1)i: main memory: close closer closest (1) ii: register memory: close closer closest (1) : cache memory: close closer closest (3)c: Briefly distinguish between Static RAM (SRAM) and Dynamic RAM (DRAM) in terms of structure and speed. (2)i: How do SRAM and DRAM differ in structure (components): SRAM is constructed of: DRAM is constructed of (1): Which is faster? (6) 9. Using the OAM Instruction Set, write a program that reads two integers from input and prints their sum. tin

(6) 10. Using the OAM Instruction Set, write a program that reads an integer from input and prints it. If the integer is positive, it branches back to read another integer from input. If the number is negative, it changes the number's sign to positive, prints it again, and halts. If the number is 0, it simply halts. 0 12 Here are four sample inputs: 2 21 0 5 3 -7 - 3 Here are their outputs: O 21 0 ا دنيا له یہ بن بن 12 -3 3 (6) 11. Using the OAM instruction set and counter-controlled repetition, write a program which Reads four inputs and prints the input if the input is 7. Multiple choice. Circle the best available answer. (4) 12. Consider the following code from OAM: 1. SET 10 2. LoopStart, STA O 3. DEC 4. BRP LoopStart 5. HLT (2) a. The LoopStart label exemplifies the following benefit: A Use of symbolic operation codes rather than numeric (binary) ones B. Use of fewer symbolic instructions than numeric (binary) ones C. Use of symbolic memory addresses rather than numeric (binary) ones (2) b. The DEC instruction exemplifies the following benefit A Use of symbolic operation codes rather than numeric (binary) ones B. Use of fewer symbolic instructions than numeric (binary) ones C. Use of symbolic memory addresses rather than numeric (binary) one

(2) 13. The IEEE ethernet standard (802.3) utilizes the Carrier Sense, Multiple Access/Collision Detection (CSMA/CD) protocol to cope with instances when two hosts both wish to send messages over the same channel at the same time. Very briefly, identify the correct order of the four steps protocol dictates once a transmitting node has sensed a collision: 1. Send, stop sending, wait a random amount of time, listen for traffic 2. Stop sending, wait random amount of time, listen for traffic, send 3. Send, listen for traffic, wait a random amount of time, stop sending 4 4. Listen for traffic, stop sending, wait a random amount of time, send (2) 14. Packets at the following layer(s) include checks to insure that message content arrives correctly A Transport and network layers B Network layer only C. Transport and data link layers D. Data link layer only E. Network and data link layers (2) 15. Routers direct datagrams toward their ultimate destination at the A Transport layer B. Network layer C. Data Link layer D. Physical layer

< (2) 16. The RSA algorithm utilizes A Large prime numbers B Exponents C Modulo division D. Relative prime numbers E. All of the above (2) 17. Among message secrecy, message authentication, and message integrity in the context of message security, which guarantees the identity of the sender A Message Secrecy B. Message Authentication C. Message Integrity D None of the above (2) 18. Using Caesar Cipher with s - 2, encode the word CABBY (2) 19. Very briefly, how does a hash function differ from an encryption key? (4) 20. Our text distinguishes between symmetric encryption and asymmetric encryption.

(1) a: How many keys are required for symmetric encryption? (1) b: How many keys are required for asymmetric encryption? (1) c. For which type is the DES algorithm used? (1) c: What is the advantage of asymmetric encryption in this context? (2) 21. In Python, given the following code: name 'a beautiful sunset Write code which will print: a cautiful (2) 22. In Python, given the following code: mylist - [[1,2,31[4,5,6],[7,8,9]] Write code which will print: 8 (2) 23. What will the following code print? I Mylist - [1,2,3] Mylist.append((4,5)) print(Mylist[1:))

(2) 24. What will the following code print? myList = [1,2,3,4,511 for index in range (1. len(myList)-1): print(myList[index:index+2]) (8) 25. (6) a: In Python, define a function called firstDescending that accepts a list a 6 of at least two integers and returns the first integer that is smaller than its predecessor in the list. If there are no such integers, it returns the string 'No elements are descending! I (2) b: Write code that calls firstDescending and prints the result, given the following line of code: L - [2, 7, 7, 3, 3, 6, 2,5]

Professor Segre's OAM (One Address Machine) instruction set (not including BRI and BRS) ALU Instructions ALU instructions that operate on both the ACC and the B register ADD address #load B, add ACC and B, store result in ACC SUB address #load B, subtract B from ACC, store result in ACC MLT address #load B, multiply ACC and B, store result in ACC DIV address #load B, divide ACC by B, store result in ACC ALU instructions that do not interact with memory SET value NEG INC DEC #set ACC to value #negate ACC #increment ACC value by 1 (increase ACC value by 1) #decrement ACC value by 1 (decrease ACC value by 1) ALU instructions dealing with memory and I/O LDA address #load ACC with value stored in specified memory location STA address #store contents of ACC in specified memory location ALU instructions dealing with flow control (branching/conditionals) BR address #take next instruction from address I BRP address #next instruction from address if ACC is positive, else ignore BRZ address #next instruction from address if ACC is zero, else ignore ALU instruction to halt HLT