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Consider a processor implementation, P1 of some RISC (MIPS or risc-v) instruction set architecture (ISA). There are thre
Posted: Fri May 20, 2022 5:01 pm
by answerhappygod
- Consider A Processor Implementation P1 Of Some Risc Mips Or Risc V Instruction Set Architecture Isa There Are Thre 1 (74.99 KiB) Viewed 44 times
Consider a processor implementation, P1 of some RISC (MIPS or risc-v) instruction set architecture (ISA). There are three classes of instructions (ALU, Ld/St, and Branch) in the instruction set. P1 has a clock rate of 3.9GHz. The average number of cycles for each instruction class and their frequencies (for a typical program mix) are as follows: Instruction Class P1 CPI Frequency Ld/St 4 30% ALU ? 40% Branch 2 30% (a) What is the ALU CPI required for P1 to achieve an average CPI of 2.6 (rounded to the nearest integer)? 3 (b) What is the mips rating for P1 (rounded to the nearest integer)? (c) If the average Google search takes 30 billion instructions to execute, how long in seconds would P1 as specified above need to do that search (rounded to the nearest integer)? (d) Which one of the Eight Great Ideas could be utilized to dramatically (more than a factor of 10) decrease the search time? (e) Which one (most important) of the remaining Great Ideas enabled that Great Idea (your previous answer)?