How did CPLDs evolve from PROMs to PALs? Explain using fixed and programmable logic operations of PROMs, PLAs and PALS.
Posted: Sun May 15, 2022 8:36 pm
How did CPLDs evolve from PROMs to PALs? Explain using fixed and programmable logic operations of PROMs, PLAs and PALS. Design a digital lock using a double process FSM having key as 1110. The key is should be entered starting with MSB and the FSM should jump to initial condition even if a single bit is incorrect. Once the lock is opened, it should retain the open state till a 'l' is entered.