Answer Happy

- For BOX 1 (CHOOSE ONE OPTION and GIVE
EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 2 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 3 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 4 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 5 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 6 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 7 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
- For BOX 8 (CHOOSE ONE
OPTION and GIVE EXPLANATION):
OR Gate
XOR Gate
Equality Comparator
Zero extend
XNOR gate
NOR gate
AND gate
2-1 Mux
Adder
Sign extend
Inverter
NAND gate
Design the following 4-bit ALU using one Adder and 4-1 Mux. A and B are 4-bit signed numbers in two's complement systems. X[3:0] X[3:0) A B 0 2. X[3] Fle 6 1 4 4-1 MUX Y F2 E1 0 0 0 0 0 1 1 0 1 0 1 1 1 1 5 Fo Output 0 A+B 1 A XOR B 0 Not used 0 A-B 1 A XNOR B' 0 A<B 1 A=B 2 3 8 F2 F1 Fo For each box select the appropriate logic circuit. Note: The Adder may only be used once. Some circuits might be used multiple times, others not at all.