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4. [20 pts) Design a 4-bit arithmetic circuit, with two selection variables Si and So, that generates the arithmetic operations in the following table. Draw the logic diagram for a single bit stage. Note that B' represents "Not B”. Select Si 0 0 1 1 So 0 1 0 1 Input X Y A all Os A all Is A B A B' G Cin=0 Cin=1 G=A (transfer) G=A+1(increment) G=A-1 (decrement) G=A (transfer) G=A+B (add) G=A+B+1 G=A+B' G=A+B'+1(substract) A) [8 pts] Complete the following truth table. Inputs Outputs Si So A; Bi Xi Y B) B) [4 pts] Please write down an optimized equation for Xi and Yi, respectively. You can use K-maps to optimize the equations on a scratch paper. Please do not turn in your K-maps when you submit your final exam. You only need to write down your optimized equations here.

C) [8 pts] Please draw the logic diagram for a single bit stage. You can use any gates that you want. You can draw the circuit on a white paper using a ruler, and then, take a photo of it. Next, you can insert the photo here. Hint: for the circuit of Y; you can use a 4-to-1 Mux. Note that you are not required to use a Mux. However, using it can save you time in drawing the circuit. Also, it makes your circuit simpler.