Q1) For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cac
Posted: Sat May 14, 2022 7:57 pm
Q1) For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cache: Tag Index 9-5 Offset 4-0 31-10 a) What is the cache block size (in words b) How many entries does the cache have? c) Starting from power on, the following byte-addressed cache references are recorded (addresses are in decimal): 0,4, 16, 132, 232, 160, 1024, 30, 140, 3100, 180, 2180 I C.1) How many blocks are replaced? c.2) What is the hit ratio?