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Problem #1: Tag, Index, Offset Each part of this problem uses the address 0x046C58F4 which is replicated in binary at the beginning of each section to assist you in solving the problem. For each section, specify the part of the address that corresponds to the tag, index, and offset for each cache configuration. Express your answer in hexadecimal in the boxes provided. If one of the fields is not used, write "unused" in the answer box. a) A direct-mapped cache with a block size of 64 words, a word size of 32-bits, and a cache size of 128 blocks. Address: 0000 0100 0110 1100 0101 10001111 0100 Block Tag Index Offset Byte Offset Ох | Ох Ох Ох b) A fully-associative cache with a block size of 128 words, 64-bit words, and a cache size of 256 blocks. Address: 0000 0100 0110 1100 0101 1000 1111 0100 Block Byte Tag Index Offset Offset Ох Ox Ох Ох