Q1-UART interrupts are armed so that interrupts occur when new data arrives into the microcontroller (like Section 2.4).
Posted: Sat May 14, 2022 6:40 pm
Q1-UART interrupts are armed so that interrupts occur when new data arrives into the microcontroller (like Section 2.4). Consider the situation in which a FIFO queue is used to buffer data between the receiver ISR and the main program. The UARTO_Handler reads UARTO_DR_R and saves the data by calling RxFifo_Put. When the main program wants input it calls UART InChar, which in turn calls RxFifo_Get . Experimental observations show the software FIFO is usually empty, and has at most 3 elements. What does it mean? Choose A-F and F briefly justify your selection. A) The system is CPU bound B) Bandwidth could be increased by increasing the software FIFO size C) The system is I/O bound D) The software FIFO could be replaced by a global variable E) The latency is small and bounded F) Interrupts are not needed in this system
Q2- The main program synthesizes a waveform (defines a sequence of DAC output values) and a periodic output compare interrupt will output the data to the DAC separated by a fixed time. A software FIFO queue is used to buffer data between a main program (e.g., main program calls DAC_Out , which in turn calls Fifo_Put ). A timer interrupt service routine calls Fifo_Get and actually writes to the DAC. At the beginning of the ISR, experimental observations show this software FIFO is usually empty and has at most 3 elements. What does it mean? Choose A-F. A) The system not operating properly because it is CPU bound B) The system not operating properly but could be fixed by increasing software FIFO size C) The system is not operating properly because it is 1/0 bound D) The system is operating properly, but the software FIFO could be replaced by a global variable E) The system is operating properly, but bandwidth could be increased by increasing the timer interrupt rate F) The system is operating properly, but interrupts are not needed in this system Q3- You wish to record sound. The frequency components you wish to analyze are 200 to 2000 Hz. The signal to noise ratio of your microphone is 50 dB. What ADC precision and sampling rate would you choose? Justify your answer.
Q2- The main program synthesizes a waveform (defines a sequence of DAC output values) and a periodic output compare interrupt will output the data to the DAC separated by a fixed time. A software FIFO queue is used to buffer data between a main program (e.g., main program calls DAC_Out , which in turn calls Fifo_Put ). A timer interrupt service routine calls Fifo_Get and actually writes to the DAC. At the beginning of the ISR, experimental observations show this software FIFO is usually empty and has at most 3 elements. What does it mean? Choose A-F. A) The system not operating properly because it is CPU bound B) The system not operating properly but could be fixed by increasing software FIFO size C) The system is not operating properly because it is 1/0 bound D) The system is operating properly, but the software FIFO could be replaced by a global variable E) The system is operating properly, but bandwidth could be increased by increasing the timer interrupt rate F) The system is operating properly, but interrupts are not needed in this system Q3- You wish to record sound. The frequency components you wish to analyze are 200 to 2000 Hz. The signal to noise ratio of your microphone is 50 dB. What ADC precision and sampling rate would you choose? Justify your answer.