Answer Happy

We could have designed this circuit using a different type of flip-flop. The state diagram and state table are not changed whether you use a D-FF or another type, such as JK-FF or T-FF. However, you need to derive the different input equations for JK-FF or T-FF. To do that, you need to make up the table for input(s) of the flip-flops using the appropriate excitation table. Excitation Table of T-FF Excitation Table for JK flip-flop Q(t) Q(t + 1) Q(1) Q(t + 1) T J K 0 0 0 0 1 0 1 X х X Х 1 0 0 0 1 1 0 1 1 0 1 1 (b) T (a) JK 2. Use T-flip flops to design a 3-bit counter that will repeat the sequence from 0 to 6, but skip the number 4 (i.e., the output sequence is 0+1+2+3+5+6+0+1+2+3+576...). If the initial value of the counter is not a valid value (such as 4 or 7), it must set to 001 after the first clock pulse and then continue the proper count sequence. Step 1: Draw the State Diagram below: Step 2: Determine the # of flip-flops needed: Then derive the state table and write it below. Use (An... A2A1Ao) for the name of flip-flops.
Step 3: Derive the inputs of flip-flops (using excitation table as needed) and add columns listing their values to the state table above. Use (T.... T2Ti To) for the names of the inputs. Step 4: Draw as many K-maps as necessary below, and use them to obtain the input equations of flip-flops. Step 5: Draw the circuit diagram. Since we have no T-FF chips, you need to build T flip-flops from JK- flip flops. Refer Lab 8 for how to do this. Step 6: Construct circuit and test it. List all the IC chips used:
completed the lab. ICs needed: 7474 (D-FF), 3x 7476(JK-FF), 74195 (shift register), 7486(XOR), 7404 (inverter), 2x 7408 (AND), 7432 (OR)