Answer Happy

Please write Verilog code ,thanks
by using shift Part 3:FSM a W For this pomem me sequence-elector Tom registers, instead of using the more formal approach described above. Create Verilog code that instantiates two 4-bit shift registers; one is for recognizing a sequence of four Os, and the other for four ls. Include the appropriate logic expressions in your design to produce the output (z). Make a Quartus II project for your design and implement the circuit on the development board. Use the switches and LEDs on the board in a similar way as you did for Parts I and II and observe the behavior of your shift registers and the output (z). Answer the following question: could you use just one 4-bit shift register, rather than two? Explain your answer. The list of the required inputs and outputs are showed in Table 6. velopment board Table 6. The list of the required inputs and outputs of the part 3. Output Input LEDR, SWO Active-low reset Output (z) LEDR7-0 Flip-flop state (two shift register buffer) SW Input (w) KEY Clock