Linear Electronics question A.3
Posted: Mon May 09, 2022 7:36 am
Linear Electronics question A.3
Question A3 i. Sketch the small-signal equivalent model for an npn bipolar transistor. [3 marks] April/May 2022 Page 3 of 8 5304ELE Linear Electronics it. ii. iv. For the npn bipolar transistor, the collector current swings from 2 mA to 5 mA as the base current is changed from 5 HA to 15 HA. Find the current gain, B. [4 marks) Explain what the load line is and explain the difference between DC and AC load lines. [4 marks) Use load lines to explain how the negative and positive peaks of vout are dipped. [4 marks] Explain the difference between the maximum deliverable power and the supplied de power. [4 Marks] Fig. QA shows one typical collector curve (Vcelc) for a BIT. a. Identify three different regions in the curve. [3 Maris] b. Explain which region should be used for amplification. [3 Marks) V. vi. b = 10 ImA Voe IV 400 Fig. QA
Question A3 i. Sketch the small-signal equivalent model for an npn bipolar transistor. [3 marks] April/May 2022 Page 3 of 8 5304ELE Linear Electronics it. ii. iv. For the npn bipolar transistor, the collector current swings from 2 mA to 5 mA as the base current is changed from 5 HA to 15 HA. Find the current gain, B. [4 marks) Explain what the load line is and explain the difference between DC and AC load lines. [4 marks) Use load lines to explain how the negative and positive peaks of vout are dipped. [4 marks] Explain the difference between the maximum deliverable power and the supplied de power. [4 Marks] Fig. QA shows one typical collector curve (Vcelc) for a BIT. a. Identify three different regions in the curve. [3 Maris] b. Explain which region should be used for amplification. [3 Marks) V. vi. b = 10 ImA Voe IV 400 Fig. QA