For a certain logic-circuit family, the basic technology provides an inherent limit in the voltage gain of 25 V/V, maxim
Posted: Mon May 02, 2022 2:37 pm
For a certain logic-circuit family, the basic technology
provides an inherent limit in the voltage gain of 25 V/V, maximum
(in absolute value). If, with a 2 V supply, the values of VOL and
VOH are ideal, but VM = 0.47VDD, what are the best possible values
of VIL [5 points] and VIH [5 points]? What are the best possible
noise margins NML [2 points] and NMH [2 points]? If the actual
noise margins are 0.85 times these values, what VIL [3 points] and
VIH [3 points] result? What is the large-signal voltage gain,
defined as the absolute value of (VOH – VOL)/(VIH – VIL) [5
points]?
provides an inherent limit in the voltage gain of 25 V/V, maximum
(in absolute value). If, with a 2 V supply, the values of VOL and
VOH are ideal, but VM = 0.47VDD, what are the best possible values
of VIL [5 points] and VIH [5 points]? What are the best possible
noise margins NML [2 points] and NMH [2 points]? If the actual
noise margins are 0.85 times these values, what VIL [3 points] and
VIH [3 points] result? What is the large-signal voltage gain,
defined as the absolute value of (VOH – VOL)/(VIH – VIL) [5
points]?