R r + vr(1) - ||iz(t) + + vs(t) La C = V(t) Thévenin FIGURE P10-36 = 10–37 The initial conditions for the circuit in Fig
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R r + vr(1) - ||iz(t) + + vs(t) La C = V(t) Thévenin FIGURE P10-36 = 10–37 The initial conditions for the circuit in Fig
R r + vr(1) - ||iz(t) + + vs(t) La C = V(t) Thévenin FIGURE P10-36 = 10–37 The initial conditions for the circuit in Figure P10–36 are vc(0) = 0 and il(0) = 7o. Transform the circuit into the s domain and use superposition and voltage division to find the zero-state and zero-input components of Vr(s). 10–38 The circuit in Figure P10–36 is in the zero state. Trans- form the circuit into the s domain and find the Thévenin equivalent circuit at the capacitor's terminals. a
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