Q.1. Given that X is a 4-bit signed number represented using 2's complement representation. It is required to design a c
Posted: Fri Apr 29, 2022 12:03 pm
Q.1. Given that X is a 4-bit signed number represented using 2's complement representation. It is required to design a combinational circuit to compute the equation Y=4X+5.
d) (7 points) Write a Verilog module for modeling your circuit by using an assign statement for each output equation. e) (5 points) Write a Verilog test bench to test the correctness of your circuit for the following input values: X=0, X=-1, X=7, and X=-8. Allow a period of 20 ps between two consecutive test cases.
d) (7 points) Write a Verilog module for modeling your circuit by using an assign statement for each output equation. e) (5 points) Write a Verilog test bench to test the correctness of your circuit for the following input values: X=0, X=-1, X=7, and X=-8. Allow a period of 20 ps between two consecutive test cases.