Q 1 Given That X Is A 4 Bit Signed Number Represented Using 2 S Complement Representation It Is Required To Design A C 1 (18.77 KiB) Viewed 37 times
Q 1 Given That X Is A 4 Bit Signed Number Represented Using 2 S Complement Representation It Is Required To Design A C 2 (40.06 KiB) Viewed 37 times
Q.1. Given that X is a 4-bit signed number represented using 2's complement representation. It is required to design a combinational circuit to compute the equation Y=4X+5.
d) (7 points) Write a Verilog module for modeling your circuit by using an assign statement for each output equation. e) (5 points) Write a Verilog test bench to test the correctness of your circuit for the following input values: X=0, X=-1, X=7, and X=-8. Allow a period of 20 ps between two consecutive test cases.
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