3 3 4 10 Question 1 Consider The Following Set Of Mips Instructions Lw 81 10 Ss2 Add S3 Ssl St4 Sub 84 Ssl 1 (23.06 KiB) Viewed 15 times
3 3 4 10 Question 1 Consider The Following Set Of Mips Instructions Lw 81 10 Ss2 Add S3 Ssl St4 Sub 84 Ssl 2 (23.06 KiB) Viewed 15 times
(3+3+4=10) Question 1: Consider the following set of MIPS instructions: LW $81, 10(Ss2) ADD $s3, Ssl, St4 SUB $84, Ssl. St4 OR Ss5, Ss3, Ss1 LW $50, 40(Ss2) AND SI, Ss5, $s4 SLL $s3, $so, s4 SW Ss1, 50($s2) Assuming a 5 stage multi-cycle processor design, provide the following: 1) Identify the data dependencies and data hazards involved in this code. 2) A pipeline diagram of the set of instructions with no forwarding 3) A pipeline diagram of the set of instructions assuming forwarding
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