> Example: write to RAM if wr_en=1, read from RAM if rd_en=1 LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY ram2 IS G

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Example Write To Ram If Wr En 1 Read From Ram If Rd En 1 Library Ieee Use Ieee Std Logic 1164 All Entity Ram2 Is G 1 (54.89 KiB) Viewed 23 times

> Example: write to RAM if wr_en=1, read from RAM if rd_en=1 LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY ram2 IS GENERIC ( bits: words: PORT (wr_ena, clk: addr: bidir: PROCESS (clk, wr_ena) BEGIN END ram2: INTEGER := 8: INTEGER END ram2: ARCHITECTURE ram OF ram2 IS TYPE vector array IS ARRAY (O TO words-1) OF STD_LOGIC_VECTOR (bits-1 DOWNTO 0); SIGNAL memory: vector_array: BEGIN END IF: END PROCESS: 16): -- # of bits per word -- # of words in the memory IN STD LOGIC IN INTEGER RANGE O TO words-1; INOUT STD_LOGIC_VECTOR (bits-1 DOWNTO 0)); IF (wr_ena='0') THEN bidir memory(addr); ELSE bidir (OTHERS => 'Z'); IF (cIKEVENT AND clk='1') THEN memory(addr) <= bidir; END IF: